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ASIC/SoC Design & Verification Engineer

Mercor

Specialised Engineering Contractor · Part-time Short-term
United States $70 – $100/hr July 3, 2026

Job description

Join a leading AI lab as an ASIC/SoC Design & Verification Engineer, helping train and evaluate next-generation AI models on real-world chip engineering tasks. This remote W-2 role is ideal for engineers with hands-on ASIC/SoC design or verification experience who can create realistic hardware engineering problems, develop reference RTL and verification environments, and evaluate AI-generated solutions.

Key Responsibilities

Create Real-World Hardware Engineering Tasks

  • Design realistic ASIC/SoC engineering problems based on practical industry experience.
  • Develop challenges involving RTL design, debugging, verification, and silicon development.

Build Reference Solutions

  • Implement reference RTL, testbenches, and supporting materials using SystemVerilog/Verilog.
  • Prepare complete engineering solutions for AI evaluation.

Evaluate AI Performance

  • Test AI-generated hardware solutions against expert reference implementations.
  • Identify capability gaps, reasoning errors, and verification failures.
  • Document findings to improve AI performance.

Collaborate with Engineering Experts

  • Review tasks created by fellow engineers.
  • Maintain consistent technical quality and engineering rigor across the project.

Ideal Qualifications

  • Hands-on ASIC/SoC design and/or functional verification experience.
  • Experience working on production silicon or tapeout projects.
  • Strong SystemVerilog and Verilog skills.
  • Experience with industry EDA tools such as:
    • Synopsys VCS
    • Cadence Xcelium
    • Siemens Questa
    • VC Formal
    • Verdi
  • Or open-source alternatives including:
    • Verilator
    • Icarus Verilog
    • CocoTB
    • Yosys
    • OpenROAD
  • Expertise in one or more of:
    • RTL Design & Microarchitecture
    • Functional Verification (UVM, SVA, CocoTB)
    • Formal Verification
    • Coverage Closure
    • Timing & Synthesis Optimization
    • IP Integration (PCIe, DDR, ARM/AXI, NoC)
    • Analog/Mixed-Signal Verification
    • Specification Development

Compensation

  • $70–$100 per hour

Job Details

  • Remote (United States)
  • W-2 Contingent Role
  • Part-time (20–40 hours/week)

About Cincinnatus

Cincinnatus partners with leading AI labs to employ highly skilled professionals on long-term AI research initiatives. Employees work directly with client engineering teams while receiving payroll, benefits, and employment support through Cincinnatus.

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